Electrically erasable programmable nonvolatile memories include a flash memory as well known in the art, which comprises a memory cell array of NAND-connected or NOR-connected memory cells having a floating gate structure. A ferroelectric memory is also known as a nonvolatile fast random access memory.
On the other hand, technologies of pattering memory cells much finer include a resistance variable memory, which uses a variable resistor in a memory cell as proposed (Patent Document 1). The resistance variable memory of such the type utilizes the fact that the resistance ratio of crystal to non-crystal of chalcogenide glass is as large as 100:1 or more, and stores the different resistance states as information. The resistance variable memory may include a serial circuit of a Schottky diode and a variable resistor in place of the transistor to configure a memory cell. Accordingly, it can be easily stacked in layers and three-dimensionally structured to achieve much higher integration as an advantage (Patent Document 2). Each memory cell is, however, just allowed to control two states: a high-resistance state and a low-resistance state, without estimating write.    [Patent Document 1] JP 2002-541613T    [Patent Document 2] JP 2005-522045T